قطعات پسیو (غیرفعال) سلف، سیم‌پیچ و چوک خط تأخیر

Product Attributes

Introduction

This device is a dual-channel variable delay chip operating at data rates from DC to 5Gbps. Each channel provides a delay adjustment range of 1.3ns to 6.1ns, with a minimum step size of approximately 5ps and an integral nonlinearity of approximately 15ps. The chip uses a 3-wire SPI interface (SDATA, SCLK, and SLOAD signals) to configure delay values. Each channel features a 10-bit delay control word, and both channels share a common pair of serial control ports. Multiple devices can be cascaded to achieve larger delay values. The chip is available in a QFN24 package measuring 4×4mm and operates over the industrial temperature range of -40℃ to +85℃.

Features

• Dual-channel programmable delay line
• Serial data interface (SDATA, SCLK, SLOAD)

Applications

• Multi-channel clock synchronization
• Automatic test equipment