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Product Attributes

Introduction

The SMJ4464 is a high-speed, 262,144-bit dynamic random-access memory organized as 65,536 × 4-bit words. It uses advanced SMOS (Scaled MOS) N-channel double-level polysilicon/polycide gate technology for high performance, low cost, and improved reliability.

The device offers maximum RAS access times of 120 ns, 150 ns, or 200 ns. Typical power dissipation is as low as 275 mW in active mode and 1.25 mW in standby mode.

The new SMOS technology enables single 5 V supply operation, reducing system power and decoupling requirements while simplifying board layout. Peak IDD is typically 125 mA, and the device tolerates input voltage undershoot of -0.7 V, minimizing system noise considerations.

All inputs and outputs, including clocks, are compatible with 54-series TTL. All address and data input lines are on-chip latched to simplify system design. Data outputs are unlatched to allow greater system flexibility.

The SMJ4464 is available in an 18-pin, 300-mil ceramic side-brazed DIP and an 18-pad leadless ceramic chip carrier package. The S version operates over a temperature range of -55°C to 110°C, and the L version operates over a range of 0°C to 70°C. The DIP is designed for insertion into mounting hole rows with a center-to-center spacing of 7.62 mm (300 mils).