مدار مجتمع (آی سی) آی‌سی خطی (آنالوگ) پردازش ویدئو

Product Attributes

Introduction

The MS1861 integrates HD, LVDS, and digital video signal inputs in a single chip; the output can drive MIPI (DSI-2), LVDS, Mini-LVDS, and TTL-type TFT-LCD displays. It supports filtering, image enhancement, sharpening, contrast adjustment, video scaling, cropping, rotation, on-screen character (graphic) overlay, and frame rate conversion of input video signals. Gamma correction and dithering algorithms can be applied to accommodate different TFT-LCD panel characteristics, with timing control signals generated for panel driving. An ARM Cortex-M0+ processor is integrated, along with peripheral interfaces including UART, IIC, SPI, PWM, GPIO, and ADC. The built-in video, graphics, processor, and panel driver functional blocks make the MS1861 a single-chip solution suitable for a wide range of product designs, and it can be broadly applied in video signal reception, processing, and display driving applications.

Features

• UHD@60Hz support
• Maximum resolution 3840×2160@60Hz
• 8/10/12/16-bit color depth
• RGB, YCbCr444, YCbCr422, and YCbCr420 color space support
• Input mode auto-detection
• Error character detection
• Auto equalization adjustment
• Hot-plug detection
• EDID data programmable
• 8-channel audio, sample rate: 32KHz~1536KHz
• VESA and JEIDA data mapping
• 1:5 input in monochrome mode, odd/even pixel mode
• LVDS clock frequency range: 25MHz~110MHz
• Selectable 6-bit and 8-bit data depth
• Single/dual channel mode
• Built-in 100Ω termination resistors
• Digital video input 8/16/24-bit
• YUV444, YUV422, and RGB color space
• BT601, BT656, BT709, and BT1120
• Dual-edge sampling mode
• Digital video input clock frequency range: 20MHz~165MHz
• DE mode and H/V sync mode selection
• RGB port swapping
• High/low bit swap per port
• Auto mode detection
• Input clock phase adjustment
• Digital video output 8/16/24-bit
• Digital video output clock frequency range: 20MHz~165MHz
• Output clock phase adjustment
• IO voltage: +3.3V, +2.5V, +1.8V selectable
• Interlaced-to-progressive conversion
• De-interlacing edge correction
• Global noise filtering
• 3:2/2:2 pulldown detection
• Independent horizontal and vertical scaling
• Frame rate conversion: up-conversion and down-conversion
• Transition improvement
• Dynamic image edge enhancement
• Brightness, saturation, contrast, and hue adjustment
• 3D noise reduction
• Anti-flicker processing for video and graphics output
• Input timing signal filtering
• 90/180/270° rotation
• Horizontal mirror and vertical flip
• Configurable display driver signal parameters based on panel specifications, including active pixels per line, pulse width, and start position; configurable range: 4096 (horizontal) × 4096 (vertical)
• Configurable POL signal waveform parameters and cycle count based on panel polarity characteristics
• Selectable configuration for DIO1, DIO2, STV1, and STV2 signal input/output characteristics
• Power-on sequence control for TCON signals and panel interface signals
• Black/white/red/green/blue solid color field
• Red/green/blue/white grayscale
• Grid
• Checkerboard
• Nine-grid
• Bitmap overlay display
• Customizable 1bpp, 2bpp, or 4bpp mixed character library, capacity 128KB, maximum character size 32×64
• 4 independent OSD windows, maximum 4096 characters per window
• Fade in/fade out
• Window zoom and rotation
• Transparency, highlight, foreground color, and background color processing
• Video overlay and Color Key processing
• 16-bit built-in DDR3
• Operating frequency 400MHz
• Storage capacity 512MBits
• LVDS transmitter clock frequency range: 25MHz~110MHz
• Selectable 6-bit and 8-bit data output
• Single/dual channel mode, maximum one clock plus four data lanes per channel
• Mini LVDS transmitter supports maximum two channels, each with maximum one clock plus six data lanes
• 6-bit and 8-bit data depth
• Adjustable output amplitude and inter-channel phase difference
• MIPI transmitter single/dual channel, maximum one clock plus four data lanes per channel
• TE signal detection
• MIPI maximum clock frequency supports 3840×2160@60Hz
• 1.5Gbps rate per lane
• DSI-2 compliant
• Independent RGB LUT gamma correction
• 8-bit input
• 10-bit output
• Built-in 4×4 programmable dithering algorithm
• 10-bit input to 8-bit output
• 8-bit input to 6-bit output
• ARM Cortex-M0+ core
• Program RAM
• Data cache
• Frequency 72MHz
• 4 built-in 32-bit timers
• 72 built-in GPIOs with peripheral multiplexing
• 4 built-in UARTs
• Watchdog
• System timer
• 4-channel hardware IIC, master/slave configurable
• 4-channel SPI interface, master/slave configurable
• SWD debug support
• Built-in ROM supporting external SPI Flash code loading
• Two 12-bit ADCs, 16-channel multiplexed input, 14MHz sampling clock, configurable sampling rate
• DMA support
• 8-channel PWM output
• 1-channel I2S output
• Built-in power-on reset
• External 24MHz crystal oscillator
• Operating temperature: -40℃~85℃
• 3.3V/1.1V/1.5V power supply
• Optional external I2C programming interface
• Optional external SPI programming interface
• BGA-361 package
• Lead-free, RoHS 2.0 compliant
• Package material: plastic molding compound

Applications

• LCD driver
• Display control unit
• Video processor