مدار مجتمع (آی سی) آی‌سی تعبیه‌شده (پردازنده) پردازندهٔ سیگنال دیجیتال (دی‌اس‌پی)

Product Attributes

Features

• Multicore compute with up to 1000MIPS (8 core) and 2000MIPS (16 core) performance.
• Hardware ResponseTM ports provide flexible, high - performance configurable I/O capability.
• Up to 512KB on - board memory for demanding applications.
• Embedded flash option – up to 2048KB on - board.
• Free software library support to implement your exact mix of peripherals.
• Easy to use with our free xTIMEcomposer Studio™ tools.
• The xCORE - 200TM General Purpose family of devices (XL and XLF) extends the popular xCORETM architecture to provide increased performance, memory footprint and flexibility for the most demanding applications.
• xCORE - 200 XL/XLF implements a dual - issue processor pipeline to boost peak compute performance up to 2000MIPS and 1000MMACS.
• Up to 512KB on - chip SRAM memory is available. Each member of the xCORE - 200 family has an embedded flash option for applications.
• The flexible Hardware Response ports are bonded out to I/O pins as 1bit, 4bit, 8bit, 16bit and 32bit ports, and provide support for serialized and buffered data transfer. Up to 128 general purpose I/O are available for user configuration.
• xCORE - 200 is supported by the advanced XMOS xTIMEcomposer StudioTM development environment. A wide range of microcontroller and application libraries are freely downloadable.
• Unlike conventional microcontrollers, xCORE - 200 multicore microcontrollers execute multiple realtime tasks simultaneously. The xCORE - 200 XL/XLF family includes devices with 8, 10, 12 and 16 cores. Each logical core can execute computational code, advanced DSP code, control software (including logic decisions and executing a state machine) or drive and sample data on the I/O ports.
• xCORE - 200 TM XLF216 that performs functions similar to those of an RTOS, and hardware that connects the cores directly to I/O pins, ensuring fast processing and extremely low latency. The xTIME scheduler eliminates the use of interrupts and ensures deterministic operation.
• The on - chip SRAM can be accessed in a single cycle, reducing shared memory requirements by passing data directly between tasks executing on logical cores. Similarly the xCONNECT switch is a high - speed network allowing all cores to communicate with each other.
• xCORE - 200 multicore microcontrollers include an area of one - time programmable memory with AES support to allow the implementation of secure boot functionality.

Applications

• Real-time task processing
• High-performance computing
• High-speed data transfer
• Secure boot functionality