مدار مجتمع (آی سی) آی‌سی کلاک و زمان‌بندی بافر و درایور ساعت

Product Attributes

Introduction

The US5D1204P is a 2GHz, 4-output differential high-performance clock fanout buffer. The US5D1204P is a highly versatile, low additive jitter buffer that generates four LVPECL clock output copies from one of two selectable LVPECL, LVDS, or LVCMOS inputs, suitable for a wide range of communications applications. It supports a maximum clock frequency of up to 2GHz. The device is designed for signal fanout of high-frequency, low phase noise clock and data signals. It is designed to operate with a 3.3V or 2.5V core supply voltage and a 3.3V or 2.5V output operating supply voltage.

Features

• 2:4 differential buffer
• Universal input supporting LVPECL, LVDS, and LVCMOS/LVTTL
• Four LVPECL outputs
• Maximum output frequency LVPECL - 2GHz
• Maximum propagation delay: 500ps (typical)
• Output skew: 20ps (typical)
• Part-to-part skew < 300ps
• Additive RMS phase jitter at 156.25MHz: 38fs RMS (12kHz - 20MHz), typical at 3.3V/3.3V
• Supply voltage: VDD = 3.3V or 2.5V
• Industrial temperature range: -40°C ~ 85°C
• QFN-16 package

Applications

• Clock distribution and level translation for ADC, DAC, multi-gigabit Ethernet, XAUI, Fibre Channel, SATA/SAS, SONET/SDH, CPRI, and high-frequency backplanes
• Switches, routers, line cards, timing cards
• Servers, computers, PCI Express (PCIe 3.0, 4.0, 5.0)
• Remote radio units and baseband units