آر اف (فرکانس رادیویی) و بی‌سیم ماژول‌ فرستنده‌گیرنده و مودم آر اف

Product Attributes

Introduction

The PIC32MZ W1 Family (PIC32MZ1025W104132 devices) is a general purpose, low-cost, 32-bit Microcontroller (MCU) with the Wi-Fi and network connectivity, hardware-based security accelerator, transceiver and Power Management Unit (PMU). It supports interface to an External Front-End Module. The WFI32E01 is a fully RF certified wireless module that contains the PIC32MZ1025W104 SoC and an integrated Frontend Module (FEM) with following antenna options: • PCB Antenna (WFI32E01PC/WFI32E01PE) • U.FL Connector (WFI32E01UC/WFI32E01UE) for External Antenna The PIC32MZ W1 Family supports rich set of standard PIC32 peripherals such as Wi-Fi, Ethernet MAC, USB, CAN, CANFD, SPI, I2C, SQI, UART and JTAG. TCP/IP based connectivity protocols along with SSL support enables a low-cost, low complexity system to obtain full-featured internet connectivity and reliable information exchange.

Features

• Wireless Interfaces:
  • PHY:
    • IEEE 802.11 b/g/n WLAN link
    • Single spatial stream of 20 MHz channel bandwidth
    • External FEM support for Power Amplifier (PA), Low Noise Amplifier (LNA), Transmitter/Receiver (TX/RX) switch
    • 2.4 GHz (2400 ~ 2483.5 MHz) ISM band
  • MAC:
    • Infrastructure BSS STA mode
    • Soft-AP mode functionality
    • Active and passive scanning
    • Transmit power control support over temperature and voltage
  • Security:
    • WPA3 personal (SAE and PMF-802.11w)
    • WPA2 personal, with options for WPA compatibility and PMF
    • WEP
  • Harmony Networking:
    • Out of box support for MPLAB Harmony v3 TCP/IP Stack
    • TLS v1.2 with symmetric/asymmetric crypto acceleration
• 200 MHz, MIPS32 M-Class Microprocessor Core:
  • 16 KB I-Cache, 16 KB D-Cache
  • Fixed Mapping Translation (FMT) based MMU for Optimum Embedded OS Execution
  • microMIPS Mode for Up to 35% Smaller Code Size
  • DSP-enhanced Core:
    • Four 64-bit accumulators
    • Single-cycle MAC, saturating and fractional math
  • Code-efficient (c and assembly) architecture
• On-Chip Flash and SRAM:
  • 1 MB Flash Program Memory
  • 64 KB Boot Program Flash
  • 256 KB SRAM (Program and Data)
  • 64 KB Data Buffer (DBF)
  • Dedicated Buffer for Peripherals
• Power Management and System Recovery:
  • Low-Power Modes (Dream and Sleep)
  • Integrated Power-on Reset (POR) and Brown-out Reset (BOR)
  • Secondary Oscillator and Fail Safe Clock Switch
  • Fast Power-up and Brown-out Recovery
• Security:
  • Hardware Accelerated Security Modes (with Built-in DMA Support)
  • Crypto Engine with True Random Number Generator (TRNG) for Data Encryption/decryption and Authentication (AES, 3DES, SHA, MD5 and HMAC)
  • AES Modes:
    • Electronic Codebook (ECB)
    • Cypher Block Chaining (CBC)
    • Counter Mode (CTR)
    • Cypher Feedback Mode (CFB)
    • Output Feedback Mode (OFB)
    • Galois/Counter Mode (GCM)
  • Hardware Accelerated Public Key Cryptography with Support for:
    • 16-DSP multipliers configuration
    • 256-bit ECC/ECDH/ECDSA/Curve25519
    • 256-bit Ed25519
    • 512-bit ECC/ECDH/ECDSA generation
• Clock Management:
  • 40 MHz Primary Oscillator (POSC)
  • 32.768 kHz Secondary Oscillator (SOSC)
  • Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
  • Programmable PLLs and Oscillator Clock Sources
  • Fail-Safe Clock Monitor (FSCM)
  • On-chip Clock Sources:
    • 8 MHz Fast RC (FRC) oscillator
    • 32.768 kHz Low-Power RC (LPRC) oscillator
  • Programmable PLLs and Oscillator Clock Sources
  • Independent Watchdog Timer (WDT) and Deadman Timer (DMT)
  • Fast Wake-up and Start-up
  • Support for Precise Reference Clocks to External Devices
• Direct Memory Access (DMA):
  • Eight Channels with Automatic Data Size Detection
  • Programmable 32-bit Cyclic Redundancy Check (CRC)
• Advanced Analog:
  • 12-bit ADC Module:
    • 2 MSPS with two Sample and Hold (S&H) circuits (one dedicated and one shared)
    • Up to 24 analog inputs
    • Sleep and Idle mode operations
    • Multiple trigger sources
    • Two digital comparators and two digital filters
    • Supports Touch Interface
    • 20 Analog Channels
• Communication Interfaces:
  • Up to Two CAN Modules (CAN and CAN-FD)
    • 2.0B Active with DeviceNet addressing support
  • IEEE 1588 Precision Time Protocol (PTP)
  • Up to Three UART Modules (10 Mbps):
    • Supports RS-232, RS-485, LIN 2.1 and IrDA Protocols
  • One Ethernet MAC Module (10/100 Mbps) with RMII Interface and Dedicated DMA:
    • Time synchronization support between Wi-Fi and Ethernet
  • Up to Two SPI (one 4-wire, one 3-wire) Modules with Speed up to 40 MHz
  • SQI Configurable as an Additional SPI Module (40 MHz)
  • One Full-Speed USB 2.0 OTG Interface with Dedicated DMA
  • Two I2C Modules (Up to 1 Mbaud) with SMBus Support
• Timers/Output Compare/Input Capture:
  • Seven 16-bit or up to Three 32-bit Timers/Counters
  • Four Output Compare (OC) Modules
  • Four Input Capture (IC) Modules
  • Low-power Precision Real-Time Clock and Calendar (RTCC)
• Software and Tools Support:
  • C/C++ Compiler with Native DSP/fractional
  • MPLAB Harmony Integrated Software Framework:
    • TCP/IP, USB, Graphics and mTouch Middleware
    • MFi, Android
    • RTOS Kernels: Express Logic ThreadX, FreeRTOS, OPENRTOS, Micrium ΔAC/0OS and SEGGER embOS
  • Supports Over-the-Air (OTA) and Over-the-Host (OTH) Firmware Update Modes
• Package and Operating Conditions:
  • Package:
    • 132-pin DQFN
    • Size - 10×10×0.9 mm
  • Operating conditions:
    • 2.97V to 3.63V, -40°C to +105°C, DC to 200 MHz
  • High Current Source/Sink (up to 25 mA) on All I/O Pins
  • Configurable Open-Drain, Pull-up, Pull-down and Slew Rate Controls
  • External interrupts on all I/O Pins
  • Peripheral Pin Select (PPS) to Enable Function Remap
  • 64 GPIO Pins