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NXP QN9030HN/001Z

آر اف (فرکانس رادیویی) و بی‌سیم آی سی‌ فرستنده‌گیرنده آر اف

NXP QN9030HN/001Z

Manufacturer NXP
Mfr. Part Number QN9030HN/001Z
Electland Part Code 286724
Electland Part Number NYE_QN9030HN/001Z
Category RF Transceiver ICs
Description IC RF TxRx + MCU Bluetooth Bluetooth v5.0 2.4GHz 40-VFQFN Exposed Pad
Datasheet Download

Product Attributes

Category RF and Wireless RF Transceiver ICs
type TxRx + MCU
RF Family/Standard Bluetooth
Protocol Bluetooth v5.0
Frequency 2.4GHz
Data Rate (Max) 2Mbps
Power - Output 11dBm
Sensitivity -97dBm
Memory Size 320kB Flash, 88kB RAM
Serial Interfaces I2C, SPI, PWM, UART
Voltage - Supply 1.9V ~ 3.6V
Current - Receiving 4.3mA
Current - Transmitting 7.4mA ~ 20.3mA
Operating Temperature -40°C ~ 125°C (TJ)
Mounting Type Surface Mount
Package / Case 40-VFQFN Exposed Pad
Supplier Device Package 40-HVQFN (6x6)
Features DMA function;Power-on reset function;Power-off reset function
Packaging HVQFN-40-EP(6x6)
ReachStatus REACH Unaffected
RohsStatus ROHS3 Compliant
MoistureSensitivityLevel 3 (168 Hours)
ExportControlClassNumber 5A992C
HtsusCode 8542.39.0010
Weight 0.137g

Introduction

The QN9090 and QN9090T (called QN9090 throughout this document) are ultra-low power, high performance Arm® Cortex®-M4 based wireless microcontrollers supporting Bluetooth Low Energy 5.0 to facilitate the development of Bluetooth Low Energy applications. The QN9090, supporting eight simultaneous connections, includes a 2.4 GHz Bluetooth Low Energy 5 compliant transceiver and a comprehensive mix of analog and digital peripherals. Ultra-low current consumption in both radio receive and transmit modes and also in the power down modes allow use of coin cell batteries. The product has 640 KB embedded Flash, 152 KB RAM memory. The embedded flash can support Over The Air (OTA) code download to applications. The devices include 10-channel PWM, two timers, one RTC/alarm timer, a Windowed Watchdog Timer (WWDT), two USARTs, two SPI interfaces, two I²C interfaces, a DMIC subsystem with dual-channel PDM microphone interface with voice activity detector, one 12-bit ADC, temperature sensor and comparator. The QN9090T variant has an internal NFC tag with connections to the external NFC antenna. The QN9030 variant has the same functionality as the QN9090 except for reduced memory sizes of 320 KB embedded Flash, 88 KB RAM. The QN9030T variant has the functionality of the QN9030 with the addition of an embedded NFC tag. The Arm Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level support of the block integration. The Arm Cortex-M4 CPU, operates at up to 48 MHz.

Features

  • Very low current solution for long battery life
  • Single chip device to run stack and application
  • System BOM is low in component count and cost
  • Flexible sensor interfacing
  • Embedded NTAG on QN9090T and QN9030T devices
  • Package: 6x6 mm HVQFN40, 0.5 mm pitch
  • Lead-free and RoHS compliant
  • Junction temperature range: -40 ℃ to +125 ℃
  • 2.4 GHz Bluetooth Low Energy 5.0 compliant
  • Receiver current 4.3 mA
  • Bluetooth Low Energy 5.0 2Mbps high data rate
  • Bluetooth Low Energy Receiver sensitivity -97 dBm
  • Improved co-existence with WiFi
  • Configurable transmit power up to +11 dBm, with 46 dB range
  • Transmit power / current +10 dBm / 20.3 mA
  • Transmit power / current +3 dBm / 9.4 mA
  • Transmit power / current 0 dBm / 7.4 mA
  • 1.9 V to 3.6 V supply voltage
  • Antenna Diversity control
  • 32 MHz XTAL cell with internal capacitors, able with suitable external XTAL to meet the required accuracy for radio operation over the operating conditions
  • Integrated RF balun
  • Integrated ultra Low-power sleep oscillator
  • Deep Power-down current 350 nA (with wake-up on IO)
  • 128-bit, 192-bit or 256-bit AES security processor
  • Application CPU, Arm Cortex-M4 CPU: Arm Cortex-M4 processor, running at a frequency of up to 48 MHz.
  • Arm built-in Nested Vectored Interrupt Controller (NVIC)
  • Memory Protection Unit (MPU)
  • Non-maskable Interrupt (NMI) with a selection of sources
  • Serial Wire Debug (SWD) with 8 breakpoints and 4 watchpoints
  • System tick timer
  • Includes Serial Wire Output for enhanced debug capabilities.
  • On-Chip memory: 640 KB flash (320 KB for QN9030)
  • 152 KB SRAM (88 KB for QN9030)
  • 12 MHz to 48 MHz system clock speed for low-power
  • 2x120 -bus interface, operate as either master or slave
  • 10 x PWM
  • 2 x Low-power timers
  • 2 x USART, one with flow control
  • 2 x SPI-bus, master or slave
  • 1 x PDM digital audio interface with a hardware based voice activity detector to reduce power consumption in voice applications. Support for dual-channel microphone interface, flexible decimators, 16 entry FIFOs and optional DC blocking.
  • 19-channel DMA engine for efficient data transfer between peripherals and SRAM, or SRAM to SRAM. DMA can operate with fixed or incrementing addresses. Operations can be chained together to provide complex functionality with low CPU overhead.
  • Up to four GPIOs can be selected as pin interrupts (PINT), triggered by rising, falling or both input edges.
  • Two GPIO grouped interrupts (GINT) enable an interrupt based on a logical (AND/OR) combination of input states.
  • 32-bit Real Time clock (RTC) with 1 s resolution. A timer in the RTC can be used to wake from Sleep, Deep-sleep and Power-down, with 1 ms resolution
  • Voltage Brown Out with 8 programmable thresholds
  • 8-input 12-bit ADC, 190 ksamples/s (Max.). HW support for continuous operation or single conversions, single or multiple inputs can be sampled within a sequence. DMA operation can be linked to achieve low overhead operation.
  • 1 x analog comparator
  • Battery and temperature sensors
  • Watchdog timer and POR
  • Standby power controller
  • Up to 22 Digital IOs (DIO)
  • 1 x Quad SPIFI for accessing an external flash device
  • Integrated NTAG |20⟩ plus device, NFC Forum Type 2, on QN9090T and QN9030T only
  • Random Number Generator engine
  • AES engine AES-128 to 256
  • Hash hardware accelerator supporting SHA-1, SHA-256
  • EFuse: 128-bit random AES key
  • Configuration modes
  • Trimming
  • ISO7816 smart card digital interface which with a suitable external analogue device can operate as a smart card reader
  • Sleep mode supported, the CPU in low power state waiting for interrupt
  • Deep-sleep mode supported, the CPU in low power state waiting for interrupt, but extra functionality disabled or in low power state compared to sleep mode
  • Power Down mode, main functionality powered down, wakeup possible from IOs, wakeup possible from some peripherals (I2C, USART, SPI) in a limited function mode and low power timers

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