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NXP TEF8102EN/N1

آر اف (فرکانس رادیویی) و بی‌سیم آی سی‌ فرستنده‌گیرنده آر اف

NXP TEF8102EN/N1

Manufacturer NXP
Mfr. Part Number TEF8102EN/N1
Electland Part Code 285387
Electland Part Number NYE_TEF8102EN/N1
Category RF Transceiver ICs
Description IC RF TxRx + MCU 76GHz ~ 81GHz 155-WFBGA
Datasheet Download

Product Attributes

Category RF and Wireless RF Transceiver ICs
type transceiver
Frequency 76GHz ~ 81GHz
Data Rate (Max) 40Mbps
Power - Output 12dBm
Serial Interfaces SPI
Voltage - Supply 2.97V~3.63V
Operating Temperature -40℃~+135℃
Mounting Type Surface Mount
Package / Case 155-WFBGA
Supplier Device Package 155-WFBGA (7.5x7.5)
Interface Type SPI;GPIO
Frequency Range 76GHz~81GHz
Features CRC check function
Output Power 12dBm;11dBm
Data Rate 40Mbps;480Mbps
Packaging WFBGA-155
Tariff Active True
ReachStatus REACH Unaffected
RohsStatus ROHS3 Compliant
MoistureSensitivityLevel 2 (1 Year)
HtsusCode 8542.39.0010
Weight 0.074g

Introduction

The TEF810X Car RADAR transceiver is a single-chip automotive FMCW RADAR transceiver for short-, medium- and long-range RADAR applications, covering the full car RADAR frequency band from 76 GHz to 81 GHz. The packaged IC offers a low-cost fully integrated solution for all critical mm-wave functions, in combination with ADCs at each receiver path. The mm-wave front end part consists of a waveform generator offering flexible chirp control, three transmit chains featuring binary phase control and output level stabilization, and four receive chains with high input compression and low noise figure. Each receive chain contains high-pass filters for suppression of strong low frequency signals, as well as low-pass filter functionality for suppression of signals in the ADC aliasing band. Each receive chain includes a 12-bit SAR ADC sampling at an effective rate of 40 MS/s (M samples per second). The ADC is followed by a programmable decimation filter with decimation factors of 1, 2, 4, 8 and 16. The digitized signals from the four receiver chains are serialized. There are two digital output variants available: TEF8101 output is through four high-speed LVDS data lines, plus a bit and frame clock signals for data synchronization. TEF8102 includes a CSI-2-DPHY interface with four data lanes and a clock lane. The chip uses a full-duplex SPI interface with 40 Mbps maximal transfer rate for bidirectional exchange of control and monitoring data between the RADAR IC and a host microcontroller. The TEF810X contains a functional safety monitoring circuit, keeping track of key operational parameters such as chip temperature, status of RF connections to the PCB board, locking status of the PLLs during a frequency chirp, etc. The monitoring circuitry transfers some of the monitoring functions normally performed by the microcontroller into the TEF810X, creating a virtual layered functional safety concept, with the TEF810X functional monitoring circuitry as the inner layer. The RADAR transceiver is packaged in a 7.5 mm×7.5 mm eWLB package. The package has a 15×15 sized Ball Grid Array (BGA) with 0.5 mm pitch for easy interfacing to a wide range of antenna board technologies.

Features

  • Single-chip fully integrated automotive FMCW RADAR transceiver with digital output
  • Developed in accordance to ISO26262 SEoOC methodology. Supporting ASIL-B applications
  • Car RADAR frequency band from 76 GHz to 81 GHz, addressing short-, medium- and long-range RADAR applications for the global automotive market
  • The mm-wave front end part consists of a waveform generator offering flexible chirp control with a chirp bandwidth up to 2 GHz, three transmit chains featuring binary phase control and output level stabilization, and four receive chains with high input compression point and low noise figure
  • The timing engine supports different MIMO RADAR operation modes by simple programming of digital registers controlling timing parameters and front end configuration on a chirp-to-chirp basis
  • The phase of the TX signals can be controlled on a chirp-to-chirp basis by the timing engine, or by digital I/O signals directly connected to the binary phase shifters of different TX sections
  • Each receive chain contains programmable high-pass filters for suppression of strong low frequency signals, as well as low-pass filter functionality for suppression of signals in the ADC aliasing band.
  • Each receive chain includes a 12-bit SAR ADC sampling at an effective rate of 40 MS/s. The ADC is followed by a programmable decimation filter with decimation factors of 1, 2, 4, 8 and 16
  • TEF8101: data output on four high-speed LVDS lines, in two modes: raw ADC serial data streaming, or packetized format with added CRC information
  • TEF8102: four data lanes and a clock lane. Lane speed configurable from 120 Mbps to 480 Mbps, as a function of the decimation factor
  • The chip uses a full-duplex SPI interface with 40 Mbps maximal transfer rate for bidirectional exchange of control and monitoring data between the RADAR IC and a host microcontroller
  • The TEF810X contains a functional safety monitoring circuit, keeping track of key operational parameters such as chip temperature, status of RF connections to the PCB board, locking status of the PLLs during a frequency chirp, etc.
  • The functional monitoring circuitry transfers some of the monitoring functions normally performed by the microcontroller into the TEF810X, creating a virtual “layered functional safety” concept, with the TEF810X functional monitoring circuitry as the inner layer
  • Total average power dissipation at typical conditions under 1.2 W (2TX at 50% duty cycle) and peak dissipation under 2.5 W
  • Operating junction temperature from -40 °C up to 135 °C
  • Closed-loop, linear frequency chirp generator with <0.2% typical chirp nonlinearity
  • Three chirp modes with Low Phase Noise:
  • 2 GHz chirp deviation for high-resolution distance detection in USR mode. Higher phase noise level allowed (-86 dBc/Hz @ 1 MHz), with respect to nominal 1 GHz deviation mode
  • Excellent phase stability for high angular resolution
  • Transmit power of typical 12 dBm at antenna reference plane
  • Typical receiver noise figure less than 12 dB at antenna reference plane
  • Operation from a 40 MHz crystal oscillator
  • Provides the 40 MHz clock signal to a microcontroller
  • Power consumption <50 mW in standby mode. In this condition the crystal oscillator is operative as well as the master 3.3 V LDOs
  • GPIO 3.3 V digital interface signals for compatibility with a wide range of MCUs
  • The core circuitry operates on 1.8 V and 1.1 V supply voltages. To simplify the application and decrease overall system BOM, the TEF810X offers two LDO circuits to generate the 1.8 V and 1.1 V operational voltages from a typical 2.3 V

In-Stock Suppliers

NoyanElectronic
19 in stock
Supplier Part Number: NYE_TEF8102EN/N1

1 1
QTY USD TOMAN
1+$3.971,102,290 تومان
10+$3.41946,800 تومان
30+$3.07852,400 تومان
100+$2.79774,660 تومان

Qty in reel: 260pcs/reel