مدار مجتمع (آی سی) آی سی‌کاربرد ویژه

Product Attributes

Introduction

The '76 and 'H76 are dual JK master/slave flip-flops with separate Direct Set, Direct Clear and Clock Pulse inputs for each flip-flop. Inputs to the master section are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections. The sequence of operation is as follows: 1) isolate slave from master; 2) enter information from J and K inputs to master; 3) disable J and K inputs; 4) transfer information from master to slave. The 'LS76 is a dual JK, negative edge-triggered flip-flop also offering individual Direct Set, Direct Clear and Clock Pulse inputs. When the Clock Pulse input is HIGH, the JK inputs are enabled and data is accepted. This data will be transferred to the outputs according to the Truth Table on the HIGH-to-Low clock transitions.