مدار مجتمع (آی سی) آی سی‌کاربرد ویژه

Product Attributes

Introduction

These shift registers consist of five R-S master-slave flip-flops connected to perform parallel-to-serial or serial-to-parallel conversion of binary data. Since the inputs and outputs of all flip-flops are accessible, parallel input/parallel output or serial input/serial output operations can be performed. All flip-flops can be simultaneously set to a low output level by applying a low voltage to the clear input while preset is inactive (low). The clear operation is independent of the clock input level. The register can be parallel-loaded by using the clear and preset inputs in combination. After clearing all stages to a low output level, apply the data to be loaded to the individual preset inputs (A, B, C, D, and E), then apply a high load pulse to the preset enable input. The preset operation, like the clear operation, is independent of the clock input level. Information is transferred to the outputs on the rising edge of the clock pulse. Before the rising edge of the clock input waveform, the correct information must be established at the R-S inputs of each flip-flop. The serial input provides this information for the first flip-flop, while the outputs of subsequent flip-flops provide information for the remaining R-S inputs. During clock operation, the clear input must be high and the preset or preset enable inputs must be low.

Features

• Manufactured under the Rochester brand using die/wafers sourced from original suppliers or Rochester wafers re-manufactured from original IP
• Tested via original factory test programs or Rochester-developed test solutions, guaranteed to meet or exceed original component manufacturer datasheet specifications
• ISO-9001 and AS9120 certified

Applications

• N-bit serial-to-parallel converter
• N-bit parallel-to-serial converter
• N-bit storage register