مدار مجتمع (آی سی) آی سی‌کاربرد ویژه

Product Attributes

Introduction

The Am29C861A and Am29C863A CMOS bus transceivers provide high-performance bus interface buffering for wide address/data paths or buses with parity. The Am29C861A is a 10-bit bidirectional transceiver; the Am29C863A is a 9-bit transceiver featuring NOR output enable for maximum control flexibility. Each device's data inputs have a typical input hysteresis of 20mV for enhanced noise immunity. The Am29C861A and Am29C863A are fabricated using AMD's proprietary CS11SA CMOS process, offering a typical propagation delay of 4ns and an output drive current of 48mA.

The Am29C861A and Am29C863A incorporate AMD's proprietary edge-rate controlled outputs to minimize simultaneous switching noise (ground bounce), undershoot, and overshoot. By controlling output transient current, ground bounce and output ringing are significantly reduced. The improved AMD outputs settle to stable, usable voltage levels in less time than uncontrolled outputs.

Furthermore, the speed degradation caused by an increased number of simultaneously switching outputs is also reduced. In summary, despite a slight increase in device propagation delay, these advantages of edge-rate control significantly improve system performance.

A unique I/O circuit employs n-channel pull-up transistors (eliminating parasitic diodes to Vcc) to provide high-impedance outputs during power-down and power supply sequencing, enabling glitch-free operation for card-edge and other active bus applications.

The Am29C861A and Am29C863A are available in standard package options: DIP, PLCC, and SOIC.

Features

• High-speed CMOS bidirectional bus transceiver
• T-R delay: 4ns typical
• Low standby power consumption
• Very high output drive capability
• IOL = 48mA (commercial), 3.2mA ()
• Typical hysteresis of 200mV on data input ports
• Proprietary edge-rate-controlled outputs significantly reduce undershoot, overshoot, and ground bounce
• Power-up/power-down disable circuitry enables glitch-free power sequencing
• Can be powered down in tri-state, ideal for card-edge interface applications
• Minimal speed degradation when switching multiple outputs simultaneously
• JEDEC FCT compliant