مدار مجتمع (آی سی) آی سی‌کاربرد ویژه

Product Attributes

Introduction

The PCl11010 is a single-chip PCle switch with an integrated Ethernet MAC and programmable I/O. The integrated PCle physical interfaces provide a 2-lane (2x8GT/s) upstream port and a 1-lane (1x8GT/s) downstream port. The device is targeted to address customer requests for higher bandwidth PCle sub-systems within embedded applications. The maximum line rate is 8GT/s and it is certified against the GEN4 compliance program as defined in the PCle Revision 4.x specifications. PCle upstream can be delivered across a single or multiple lanes to accommodate best system architecture. The PCl11010 includes a compliant PCle implementation from external facing physical interfaces through to switch fabric and endpoint controllers. The PCl11010 also includes an IEEE 802.3 compliant 2.5Gbps Ethernet MAC. The integrated RGMIl and SGMll interfaces support 10/100/1000Mbps and 1/2.5Gbps operation, respectively. A programmable pin multiplexer is used to map I/O functions to package pins. This enables designers to work with either a default configuration or modify signals to best fit their application. Example signals include those associated with USB operation, through to GPlO or SMBus, which are accessed via a dedicated PCle Endpoint Controller. Though many clocks are required for PCl11010 operation, these are generated within an integrated clock farm. Only a single-ended 25MHz clock or crystal is required externally together with a PCle reference clock. PCl11010 software presentation is enabled using standard abstractions to major operating systems. The PCI11010 is available in a 100-pin VQFN package in commercial (0°C to +70°C) or industrial (-40°C to +85°C) temperature ranges.

Features

• Integrated PCl switching fabric - 512byte maximum payload size
• Integrated PCle physical interfaces - 2-lane (2x8GT/s) upstream port - 1-lane (1x8GT/s) downstream port
• 2.5Gbps Ethernet MAC - IEEE 802.3 compliant - RGMll support for 10/100/1000Mbps - SGMIl support for 1Gbps - SGMll+ support for 2.5Gbps - Jumbo frame support
• Precision Time Protocol - IEEE 1588-2008 E2E and P2P one and two step support - IEEE 1588-2008 Programmable Time Compare output (e.g., 1PPS)
• Comprehensive power management features - PCle 3.1 LPSS (Low Power Sub States): L2 (with aux. power supply)
• Power and I/O - Integrated power-on reset circuit with configurable under/over voltage protection - Latch-up performance exceeds 150mA per EIA/JESD78, Class II - JEDEC Class 3A ESD performance
• UARTs - RS232/RS485 - Auto-direction control - Standard and advanced speed support - Basic or comprehensive signal support
• Additional features - Multifunction GPIOs - Programmable pin multiplexer - Ability to use low-cost 25MHz crystal or clock

Applications

• Industrial PCs (Network interface, PCle fanout)