Introduction
The TAS3002 device is a system-on-a-chip that replaces conventional analog equalization to perform digital parametric equalization, dynamic range compression, and loudness contour. Additionally, this device provides high-quality, soft digital volume, bass, and treble control. All control parameters are uploaded from an outside MCU through the |20⟩ slave port or from an external EEPROM through the |20⟩ master port.
The TAS3002 device also has an integrated 24-bit stereo codec with two |20⟩ -selectable, single-ended inputs per channel.
The digital parametric equalization consists of seven cascaded, independent biquad filters per channel. Each biquad filter has five 24-bit coefficients that can be configured into many different filter functions (such as band-pass, high-pass, and low-pass).
The internal loudness contour algorithm can be controlled and programmed with an |20⟩ command.
Dynamic range compression/expansion (DRCE) is programmable through the |20⟩ port. The system designer can set the threshold, energy estimation time constant, compression ratio, and attack and decay time constants.
The TAS3002 device supports 13 serial interface formats ( |2S, left justified, right justified) with data word lengths of 16, 18, 20, or 24 bits. The sampling frequency (fS) may be set to 32 kHz, 44.1 kHz, or 48 kHz.
The TAS3002 device uses a system clock generated by the internal phase-locked loop (PLL). The reference clock for the PLL is provided by an external master clock (MCLK) of 256fS or 512fS, or a 256fS crystal.
The TAS3002 device has six internally configurable general-purpose input (GPI) terminals that control volume, bass, treble, and equalization. Each GPI terminal has a debounce algorithm that is programmed into the TAS3002 internal microcontroller.