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ESPRESSIF ESP32-DEVKITS-R

Manufacturer	ESPRESSIF
Mfr. Part Number	ESP32-DEVKITS-R
Electland Part Code	145290
Electland Part Number	NYE_ESP32-DEVKITS-R
Category	Programmers, Emulators, and Debuggers
Description	ESP32-WROVER - Programmer
Datasheet	Download

Product Attributes

Category	Development Boards, Kits, Programmers Programmers, Emulators, and Debuggers
type	Programmer
Contents	Board(s)
Utilized IC / Part	ESP32-WROVER
Packaging	Box
Tariff Active	True
ReachStatus	REACH Unaffected
RohsStatus	Not Applicable
MoistureSensitivityLevel	1 (Unlimited)
ExportControlClassNumber	5A992C
HtsusCode	8473.30.1180
Weight	0.5g

Introduction

ESP32 is a single 2.4 GHz Wi-Fi-and-Bluetooth combo chip designed with the TSMC low-power 40 nm technology. It is designed to achieve the best power and RF performance, showing robustness, versatility and reliability in a wide variety of applications and power scenarios.

Features

Wi-Fi:
- 802.11b/g/n
- 802.11n (2.4 GHz), up to 150 Mbps
- WMM
- TX/RX A-MPDU, RX A-MSDU
- Immediate Block ACK
- Defragmentation
- Automatic Beacon monitoring (hardware TSF)
- Four virtual Wi-Fi interfaces, simultaneous support for Infrastructure Station, SoftAP, and Promiscuous modes
- Antenna diversity
Bluetooth:
- Compliant with Bluetooth v4.2 BR/EDR and Bluetooth LE specifications
- Class-1, class-2 and class-3 transmitter without external power amplifier
- Enhanced Power Control
- +9 dBm transmitting power
- NZIF receiver with –94 dBm Bluetooth LE sensitivity
- Adaptive Frequency Hopping (AFH)
- Standard HCI based on SDIO/SPI/UART, high-speed UART HCI, up to 4 Mbps
- Bluetooth 4.2 BR/EDR and Bluetooth LE dual mode controller
- Synchronous Connection-Oriented/Extended (SCO/eSCO), CVSD and SBC for audio codec
- Bluetooth Piconet and Scatternet
- Multi-connections in Classic Bluetooth and Bluetooth LE
- Simultaneous advertising and scanning
CPU and Memory:
- Xtensa single-/dual-core 32-bit LX6 microprocessor(s), CoreMark score: 1 core at 240 MHz: 504.85 CoreMark; 2.10 CoreMark/MHz; 2 cores at 240 MHz: 994.26 CoreMark; 4.14 CoreMark/MHz
- 448 KB ROM
- 520 KB SRAM
- 16 KB SRAM in RTC
- QSPI supports multiple flash/SRAM chips
Clocks and Timers:
- Internal 8 MHz oscillator with calibration
- Internal RC oscillator with calibration
- External 2 MHz ~ 60 MHz crystal oscillator (40 MHz only for Wi-Fi/Bluetooth functionality)
- External 32 kHz crystal oscillator for RTC with calibration
- Two timer groups, including 2×64-bit timers and 1× main watchdog in each group
- One RTC timer
- RTC watchdog
Advanced Peripheral Interfaces:
- 34 programmable GPIOs (Five strapping GPIOs, Six input-only GPIOs, Six GPIOs needed for in-package flash/PSRAM (ESP32-D0WDR2-V3, ESP32-U4WDH))
- 12-bit SAR ADC up to 18 channels, two 8-bit DAC, 10 touch sensors
- Four SPI interfaces
- Two I2S interfaces
- Two I2C interfaces, three UART interfaces
- One host (SD/eMMC/SDIO)
- One slave (SDIO/SPI)
- Pulse count controller
- Ethernet MAC interface with dedicated DMA and IEEE 1588 support
- TWAI, compatible with ISO 11898-1 (CAN Specification 2.0)
- RMT (TX/RX)
- Motor PWM
- LED PWM up to 16 channels
Power Management:
- Fine-resolution power control through a selection of clock frequency, duty cycle, Wi-Fi operating modes, and individual power control of internal components
- Five power modes designed for typical scenarios: Active, Modem-sleep, Light-sleep, Deep-sleep, Hibernation
- Power consumption in Deep-sleep mode is 10 µA
- Ultra-Low-Power (ULP) coprocessors
- RTC memory remains powered on in Deep-sleep mode
Security:
- Secure boot
- Flash encryption 1024-bit OTP, up to 768-bit for customers
- Cryptographic hardware acceleration: AES, Hash (SHA-2), RSA, ECC, Random Number Generator (RNG)